NXP Homebrew RF Design Challenge entry

NXP Homebrew RF Design Challenge

Minimalist 100 Watt Class C 1.8-54 MHz RF Deck

The objective of this project was to use the MRF101 in a practical and minimal cost no-tune push-pull design, covering all amateur service bands 1.8 through 54 MHz and running at 100 watts output for low thermal stress on the individual devices. The design met its goals with the exception of full power at 50 MHz.

The objectives of simplicity and low cost included the following choices:

-- No-tune operation

-- Minimal component count

-- Use of a conventional ferrite-core output transformer rather than a transmission line transformer. Although in the end this limited bandwidth, it avoided mechanical complexity and the need for DC blocking capacitors and special-purpose coax.

-- 35v operation, to simplify DC circuit component selection

-- Use of an Inexpensive power supply marketed for LED lighting.

-- External control line (PTT).

– Repurposing an existing PCB layout

Minimal RF amplifier designers have generally tried to stretch power FET's to handle frequencies and power levels for which they aren't well suited. But RF power MOSFET's in the 100 watt class have presented cost and mechanical challenges. The MRF101 now offers the ruggedness and thermal performance of modern LDMOS devices with the simplicity of a TO-220 package, with cost still well below comparable ceramic package devices (if such are even available outside of surplus channels). To expedite my experiments with the 101, I took advantage of a PCB readily found on Ebay or AliExpress and intended for use with either power FET's or NI-860 style UHF devices. The complementary pinout AN/BN pair adapts to the original tab footprint with short jumper leads.

Design highlights:

1. a 10db resistive attenuator on the input, for wideband input match and better tolerance of user overdrive error. The MRF101 has plenty of gain to make up for this.

2. No gate shunt resistor or drain-gate feedback components. The latter may improve linearity but in any case caused reduced power output.

3. Output transformer as described below.

4. DC bias circuit with a robust design suitable for 36v operation. A 2N3906 has the necessary Vce breakdown rating. Additional resistance is added for 12v relay coil drive. This design is non critical; NXP's reference circuits get by with a resistor divider.

I tested the deck extensively with $1.00 IRF510 power FET's, before risking the 101's. The hexfets gave surprisingly good performance at 25v, even producing 40 watts at 50 MHz. I didn't try them at 35V, however, as they were already close to their thermal limit at 70 watts HF output.

Output transformer design for the full frequency range is a challenge. There must be sufficient inductive reactance for true transformer operation at 1.8 MHz, without excessive loss at 50 MHz. The Zo characterization data for the MRF101 are close to 12.5 ohms across the desired range, suggesting a 1:2 turns ratio. Fair-Rite "31" mix cores are available with extra permeability at 1.8 MHz relative to "43" material. Although "43" is recommended for broadband HF use, the 31 material performed well at 50 MHz in the IRF510 tests. I added 47pf at the drains based on the data sheet Zo for 50MHz of 15.8 – j3.2, with some allowance for strays in the windings. A 1:2 turn transformer yielded 100 watts at 14--28 MHz and 50 watts at 50 MHz. A 2:4 turn implementation extended 100 watt output all the way down to 1.8 MHz, but 50 MHz output fell to 20 watts. The table gives gain and efficiency in this configuration.  Output cores are FairRite 2631540002,  24awg teflon ins. wire.

Although many published designs use a bifilar Vdd choke and omit the transformer primary center tap, my tests saw no advantage from doing so.

With an output harmonic filter (mounted externally), the amplifier is ready to pair with a 5 watt HF transceiver. Well-tested filter designs can be found on a number of web sites.

Thermal performance also met informal expectations. The devices and ferrite cores were barely warm after repeated 50% duty cycle, 15-second digital-mode transmission cycles. The heat sink is 10.5 x 3 x 1.3 inches, recycled for convenience from another amplifier. Fan-free operation looks very possible.

Test results

Bias = 2.5v, just at Vgs threshold.

MHz	Power in. pre attenuator, watts	Gain post attenuator, dB	Power out	Idd, A	Efficiency
1.8	6.2	22.1	100	3.8	75%
3.5	3.8	24.2	100	3.7	78%
7	8.9	20.5	100	3.4	83%
14	6	22.2	100	4	71%
28	6.2	22.1	100
50	4.2	16.7	20	0.8	72%

Caveats

Within the scope of the project, I tried several transformer designs and core materials. I also evaluated 25 volt operation, but could not reach 100 watts output. Time did not permit improving 50 MHz performance or pursuing gain equalization across the frequency range. I also limit my description to "Class C" because I do not have sufficient test capability to evaluate IMD.

Further goals

Somewhat more power could be obtained by increasing Vdd to 48 volts. The DC circuit would require pre-regulation (which could be a simple if inelegant resistor/zener combination) and a few component working voltage upgrades but this is easily done.

Full 100 watt output at 50 MHz is likely to require a transmission line output transformer.

The high efficiency of the MRF101 also suggests another cost cutting possibility: reducing heat sink dimensions. In particular, the TO-220 package could be mounted upright with a smaller heat sink perpendicular to the PCB, simplifying enclosure design.